Author:
Bagalkoti Abhilash,Shirol Suhas B,S Ramakrishna,Kumar Priyatam,S Rajashekar B
Cited by
8 articles.
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1. Analysis of Different LFSRs for VLSI IC Testing;2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2024-05-17
2. Reduced complexity XOR trees for LDPC codes and BS-LFSR techniques to High-Speed memory applications;AEU - International Journal of Electronics and Communications;2023-09
3. A New Method Based on Particle Swarm Optimization Algorithm to Improve Statistical Randomness Properties;2023 International Conference on Computational Intelligence and Knowledge Economy (ICCIKE);2023-03-09
4. A 500-MHz 32-bit DETFF-based Shift Register Utilizing 40-nm CMOS Technology;2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2022-11-11
5. A 100-MHz 3.352-mW 8-bit shift register using low-power DETFF using 90-nm CMOS process;International Journal of Electronics Letters;2022-06-23