SET and SEU Hardened Clock Gating Cell-Reference-Cited by-同舟云学术

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SET and SEU Hardened Clock Gating Cell

Published:2023-11-15 Issue: Volume: Page:
ISSN:
Container-title:2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)
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Author:

Andjelkovic Marko¹,Schrape Oliver¹,Breitenreiter Anselm¹,Krstic Milos¹

Affiliation:

1. IHP – Leibniz-Institut für Innovative Mikroelektronik,Frankfurt (Oder),Germany

Funder

Ministry of Education

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10335898/10335962/10335985.pdf?arnumber=10335985

Reference23 articles.

1. Overview of In-Orbit Radiation Induced Spacecraft Anomalies

2. Comparison of Combinational and Sequential Error Rates for a Deep Submicron Process

3. Ultra Low-Power Clocking Scheme Using Energy Recovery and Clock Gating

4. Novel SET Mitigation Technique for Clock Distribution Networks

5. Modeling and analysis of single-event transient sensitivity of a 65 nm clock tree

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. REMPRO: Reconfigurable Modular Processor;Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions;2024-05-07

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