VLSI Design Course with Verification of RISC-V Design using Universal Verification Methodology (UVM)-Reference-Cited by-同舟云学术

登录注册会员服务联系我们

VLSI Design Course with Verification of RISC-V Design using Universal Verification Methodology (UVM)

Published:2022-10-21 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 12th International Conference on Control System, Computing and Engineering (ICCSCE)
language:
Short-container-title:

Author:

Loh Siu Hong¹,Liew You Hong¹,Sim Jia Jia¹

Affiliation:

1. Universiti Tunku Abdul Rahman,Kampar,Malaysia

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9935572/9935579/09935582.pdf?arnumber=9935582

Reference12 articles.

1. ASIC/SoC Functional Design Verification

2. Introductory Chapter: Integrated Circuit Chip

3. Verification of processor microarchitectures

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Verification of 10 GB Ethernet MAC Core using Loopback Bringup Testcase;2023 7th International Conference on Intelligent Computing and Control Systems (ICICCS);2023-05-17

2. A rigorous approach to microprocessor verification using UVM;i-manager’s Journal on Electronics Engineering;2022

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370

www.globalauthorid.com

TOP