A Continuous-Time Sigma-Delta Modulator with Compensating Transconductance Stages and RZ FIR-DAC-Reference-Cited by-同舟云学术

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A Continuous-Time Sigma-Delta Modulator with Compensating Transconductance Stages and RZ FIR-DAC

Published:2022-01-21 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE 2nd International Conference on Power, Electronics and Computer Applications (ICPECA)
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Author:

Xu Changbao¹,Yuan Jiantao²,Liu Zhili³,Xin Mingyong¹,Chen Junjian⁴,Zheng Dandan⁵,Yao Hao⁴,Huang Kai⁵

Affiliation:

1. Electric Power Research Institute of Guizhou Power Grid Co, Ltd,Guiyang,China

2. Zhejiang University,College of Information Science and Electronic Engineering,Hangzhou,China

3. Hangzhou Sec-Chip Technology Co, Ltd,Hangzhou,China

4. Digital Grid Research Institute,CSG,Guangzhou,China

5. Zhejiang University,School of Micro-Nano Electronics,Hangzhou,China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9718567/9718570/09718873.pdf?arnumber=9718873

Reference15 articles.

1. A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries

2. A 4.7mW 89.5dB DR CT complex ΔΣ ADC with built-in LPF

3. A higher order topology for interpolative modulators for oversampling A/D converters

4. A 0.6-V, 74.2-dB DR Continuous-Time Sigma–Delta Modulator With Inverter-Based Amplifiers

5. A 95dB SNDR audio ΔΣ modulator in 65nm CMOS

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