A 0.6-V, 74.2-dB DR Continuous-Time Sigma–Delta Modulator With Inverter-Based Amplifiers
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/8470998/08403253.pdf?arnumber=8403253
Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 63 μg/√Hz Noise Floor and 14 pJ Power Efficiency Open-Loop MEMS Capacitive Accelerometer Using Closed-Loop Hybrid Dynamic Amplifier;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-04
2. A Pseudo-Virtual Ground Feedforwarding Technique Enabling Linearization and Higher Order Noise Shaping in VCO-Based ΔΣ Modulators;IEEE Journal of Solid-State Circuits;2022-12
3. A 2.16-μW Low-Power Continuous-Time Delta–Sigma Modulator With Improved-Linearity Gₘ for Wearable ECG Application;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-11
4. A 0.6-V 11-uW PVT tolerant DTMOS inverter based OTA;Balkan Journal of Electrical and Computer Engineering;2022-04-30
5. A Continuous-Time Sigma-Delta Modulator with Compensating Transconductance Stages and RZ FIR-DAC;2022 IEEE 2nd International Conference on Power, Electronics and Computer Applications (ICPECA);2022-01-21
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