Mixed-Mode Chip Implementation of Digital Space SVPWM With Simplified-CPU and 12-Bit 2.56 Ms/s Switched-Current Delta-Sigma ADC in Motor Drive-Reference-Cited by-同舟云学术

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Mixed-Mode Chip Implementation of Digital Space SVPWM With Simplified-CPU and 12-Bit 2.56 Ms/s Switched-Current Delta-Sigma ADC in Motor Drive

Published:2012-02 Issue:2 Volume:27 Page:916-930
ISSN:0885-8993
Container-title:IEEE Transactions on Power Electronics
language:
Short-container-title:IEEE Trans. Power Electron.

Author:

Sung Guo-Ming,Yu Chih-Ping,Hung Tsai-Wang,Hsieh Hsiang-Yuan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/63/6112283/05624642.pdf?arnumber=5624642

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low-Power Continuous-Time Delta-Sigma Analogue-to-Digital Converter for the Neural Network Architecture of Battery State Estimation;Electronics;2024-08-30

2. FPGA-Based High-Performance Double-Loop PDF Control Strategy for PMSM;IEEE Access;2021

3. 2+2 Switched-Current Delta-Sigma Modulator with Digital Noise Cancellation Circuit;2020 International Symposium on Computer, Consumer and Control (IS3C);2020-11

4. 4th-Order Switched-Current Multistage-Noise-Shaping Delta-Sigma Modulator With a Simplified Digital Noise-Cancellation Circuit;IEEE Access;2020

5. Switched-Current Sampled and Hold Circuit with Digital Noise Cancellation Circuit for 2+2 MASH ƩΔ Modulator;Advances in Intelligent Systems and Computing;2019

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