Hybrid-FE-Layer FeFET With High Linearity and Endurance Toward On-Chip CIM by Array Demonstration
Author:
Affiliation:
1. School of Integrated Circuits, Peking University, Beijing, China
Funder
National Key Research and Development Program of China
National Natural Science Foundation of China
111 Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/10415514/10371344.pdf?arnumber=10371344
Reference23 articles.
1. Compute-in-Memory Chips for Deep Learning: Recent Trends and Prospects
2. Novel ferroelectric FET based synapse for neuromorphic systems
3. A 28 nm HKMG super low power embedded NVM technology based on ferroelectric FETs;Trentzsch;IEDM Tech. Dig.,2016
4. A FeFET based super-low-power ultra-fast embedded NVM technology for 22 nm FDSOI and beyond;Dunkel;IEDM Tech. Dig.,2017
5. A Ferroelectric FET-Based Processing-in-Memory Architecture for DNN Acceleration
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