Evaluating the Trade-offs in the Hardware Design of the LEDAcrypt Encryption Functions

Author:

Barenghi Alessandro,Fornaciari William,Galimberti Andrea,Pelosi Gerardo,Zoni Davide

Publisher

IEEE

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. FPGA-Based Design and Implementation of a Code-Based Post-quantum KEM;SpringerBriefs in Applied Sciences and Technology;2024

2. Hardware-Software Co-Design of BIKE with HLS-Generated Accelerators;2022 29th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2022-10-24

3. FPGA implementation of BIKE for quantum-resistant TLS;2022 25th Euromicro Conference on Digital System Design (DSD);2022-08

4. On the use of hardware accelerators in QC-MDPC code-based cryptography;Proceedings of the 19th ACM International Conference on Computing Frontiers;2022-05-17

5. Efficient and scalable FPGA design of GF(2m) inversion for post-quantum cryptosystems;IEEE Transactions on Computers;2022

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