Author:
Chau Cuong,Hunt Warren A.,Kaufmann Matt,Roncken Marly,Sutherland Ivan
Cited by
4 articles.
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1. Verification-Driven Design for Asynchronous VLSI;2023 28th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2023-07-16
2. Self-timed Fused Multiplier-Adder Pipeline Optimization;2023 International Russian Smart Industry Conference (SmartIndustryCon);2023-03-27
3. Flexible Active–Passive and Push–Pull Protocols;IEEE Embedded Systems Letters;2022-09
4. Formal Verification of Flow Equivalence in Desynchronized Designs;2020 26th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC);2020-05