A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference-Reference-Cited by-同舟云学术

A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference

Published:2022-06 Issue:2 Volume:12 Page:367-380
ISSN:2156-3357
Container-title:IEEE Journal on Emerging and Selected Topics in Circuits and Systems
language:
Short-container-title:IEEE J. Emerg. Sel. Topics Circuits Syst.

Author:

Sudarshan Chirag¹^ORCID,Soliman Taha²,Lappas Jan¹,Weis Christian¹^ORCID,Sadi Mohammad Hassani¹,Jung Matthias³^ORCID,Guntoro Andre²^ORCID,Wehn Norbert¹^ORCID

Affiliation:

1. Microelectronic Systems Design Research Group, TU Kaiserslautern, Kaiserslautern, Germany

2. Robert Bosch GmbH—Corporate Research (CR/ADT2), Stuttgart, Germany

3. Fraunhofer Institute for Experimental Software Engineering (IESE), Kaiserslautern, Germany

Funder

German Ministry of Education and Research

Carl-Zeiss-Stiftung

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/5503868/9794907/09762736.pdf?arnumber=9762736

Reference38 articles.

1. ProxSim: GPU-based Simulation Framework for Cross-Layer Approximate DNN Optimization

2. Deep Residual Learning for Image Recognition

3. 3D-DATE: A circuit-level three-dimensional DRAM area, timing, and energy model;park,2018

4. Towards variation-aware system-level power estimation of DRAMs

5. Predictive technology model for nano-CMOS design exploration

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CDAR-DRAM: Enabling Runtime DRAM Performance and Energy Optimization via In-Situ Charge Detection and Adaptive Data Restoration;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09

2. Cache Register Sharing Structure for Channel-level Near-memory Processing in NAND Flash Memory;2023 24th International Symposium on Quality Electronic Design (ISQED);2023-04-05

3. FeFET versus DRAM based PIM Architectures: A Comparative Study;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03