Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning

Author:

Kumar Pratik1ORCID,Nandi Ankita1ORCID,Chakrabartty Shantanu2ORCID,Thakur Chetan Singh1ORCID

Affiliation:

1. Department of Electronic Systems Engineering, NeuRonICS Laboratory, Indian Institute of Science, Bengaluru, India

2. Department of Electrical and Systems Engineering, Washington University in St. Louis, St. Louis, MO, USA

Funder

Department of Science and Technology of India, Science and Engineering Research Board

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ARYABHAT: A Digital-Like Field Programmable Analog Computing Array for Edge AI;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-05

2. Margin Propagation based Analog Soft-Gates for Probabilistic Computing;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

3. Guest Editorial Unconventional Computing Techniques for Emerging Technology Applications;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-03

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