Device Modeling Bias in ReRAM-Based Neural Network Simulations-Reference-Cited by-同舟云学术

Device Modeling Bias in ReRAM-Based Neural Network Simulations

Published:2023-03 Issue:1 Volume:13 Page:382-394
ISSN:2156-3357
Container-title:IEEE Journal on Emerging and Selected Topics in Circuits and Systems
language:
Short-container-title:IEEE J. Emerg. Sel. Topics Circuits Syst.

Author:

Yousuf Osama¹^ORCID,Hossen Imtiaz¹^ORCID,Daniels Matthew W.²^ORCID,Lueker-Boden Martin³,Dienstfrey Andrew⁴^ORCID,Adam Gina C.¹^ORCID

Affiliation:

1. Electrical and Computer Engineering Department, George Washington University, Washington, DC, USA

2. National Institute of Standards and Technology, Gaithersburg, MD, USA

3. Western Digital Technologies, San Jose, CA, USA

4. National Institute of Standards and Technology, Boulder, CO, USA

Funder

National Institute of Standards and Technology

Western Digital

George Washington University (GW) Cross-Disciplinary Research Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

Reference40 articles.

2. Implementation of ternary weights with resistive RAM using a single sense operation per synapse;laborieux;arXiv 2007 14234,2020

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