1. FPGAs in Supercomputers: Performance Through Dataflow Programming and Flexibility;Euro-Par 2022: Parallel Processing Workshops;2023
2. FOURST: A code generator for FFT-based fast stencil computations;2022 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS);2022-05
3. Memory-Aware Functional IR for Higher-Level Synthesis of Accelerators;ACM Transactions on Architecture and Code Optimization;2022-01-31
4. Exploring Thread Coarsening on FPGA;2021 IEEE 28th International Conference on High Performance Computing, Data, and Analytics (HiPC);2021-12
5. Transformations of High-Level Synthesis Codes for High-Performance Computing;IEEE Transactions on Parallel and Distributed Systems;2021-05-01