Effect of multiple via layout on electromigration performance and current density distribution in copper interconnect
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5164157/5173200/05173363.pdf?arnumber=5173363
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Evaluation of stability and robustness of poly-Si resistors with different dopant concentrations;Japanese Journal of Applied Physics;2021-12-24
2. Electromigration-Aware Local-Via Allocation in Power/Ground TSVs of 3-D ICs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-10
3. A Method for Improving Power Grid Resilience to Electromigration-Caused via Failures;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2015-01
4. Layout Aware Electromigration Analysis of Power/Ground Networks;Circuit Design for Reliability;2014-10-16
5. Comparison of EM Performances in Circuit and Test Structures;Electromigration Modeling at Circuit Layout Level;2013
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