3.7 A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-Amplifier

Author:

ElShater Ahmed,Lee Calvin Yoji,Venkatachala Praveen Kumar,Muhlestein Jason,Leuenberger Spencer,Sobue Kazuki,Hamashita Koichi,Moon Un-Ku

Publisher

IEEE

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. 9.8 A 9.3nV/rtHz 20b 40MS/s 94.2dB DR Signal-Chain Friendly Precision SAR Converter;2024 IEEE International Solid-State Circuits Conference (ISSCC);2024-02-18

2. A 10-kHz BW 104.3-dB DR discrete-time delta-sigma modulator with ring-amplifier-based integrator;Microelectronics Journal;2024-02

3. A 16-bit 1-MS/s SAR ADC With Asynchronous LSB Averaging Achieving 95.1-dB SNDR and 98.1-dB DR;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

4. A 16B 5MS/s Pipeline-SAR ADC in 180nm CMOS;2023 IEEE 6th International Conference on Electronics and Communication Engineering (ICECE);2023-12-15

5. Analog Current-Mode 8-Point Approximate-DFT Multi-Beamformer With 4.7 Gbps Channel Capacity;IEEE Access;2023

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