A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates-Reference-Cited by-同舟云学术

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A complete GaAs HEMT single chip data receiver for 40 Gbit/s data rates

Published:1998 Issue: Volume: Page:
ISSN:
Container-title:GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 20th Annual. Technical Digest 1998 (Cat. No.98CH36260)
language:
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Author:

Lang M.¹,Wang Z.G.,Thiede A.,Lienhart H.,Jakobus T.,Bronner W.,Hornung J.,Hulsmann A.

Affiliation:

1. Fraunhofer-Inst. fur Angewandte Festkorperphys., Freiburg, Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx4/5869/15629/00722624.pdf?arnumber=722624

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Logic Design Examples;Logic Design;2003-03-19

2. Logic Design Examples;VLSI Technology;2003-03-19

3. Fully monolithic integrated 43 Gbit/s clock and data recovery circuit in InP HEMT technology;Electronics Letters;2001

4. 40 Gbit/s fully monolithic clock recovery IC using InAlAs/InGaAs/InP HEMTs;Electronics Letters;2000

5. 40 Gbit/s 1:4 demultiplexer IC using InP-based heterojunction bipolar transistors;Electronics Letters;1999

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