Total Performance of 32-nm-Node Ultralow-$k$/Cu Dual-Damascene Interconnects Featuring Short-TAT Silylated Porous Silica $(k = \hbox{2.1})$-Reference-Cited by-同舟云学术

Total Performance of 32-nm-Node Ultralow-$k$/Cu Dual-Damascene Interconnects Featuring Short-TAT Silylated Porous Silica $(k = \hbox{2.1})$

Published:2010-11 Issue:11 Volume:57 Page:2821-2830
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Oda Noriaki,Chikaki Shinichi,Kubota Takeo,Nakao Shinichi,Tomioka Kazuhiro,Soda Eiichi,Nakamura Naofumi,Gawase Akifumi,Nogawa Jun,Kawashima Yoshitsugu,Hayashi Ryo,Suzuki Tatsu,Saito Shuichi

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/5607250/05580039.pdf?arnumber=5580039

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