Comparison of three bandgap topologies implemented in standard CMOS technology with parasitic PNP bipolars-Reference-Cited by-同舟云学术

Comparison of three bandgap topologies implemented in standard CMOS technology with parasitic PNP bipolars

Published:2022-10-12 Issue: Volume: Page:
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Container-title:2022 International Semiconductor Conference (CAS)
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Author:

Gheorghita Emilia¹,Onet Raul¹,Campanu Iulian²

Affiliation:

1. Technical University of Cluj-Napoca,Cluj-Napoca,Romania

2. Infineon AG,Cluj-Napoca,Romania

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9933917/9933992/09934203.pdf?arnumber=9934203

Reference6 articles.

1. Novel Approach to Low-Voltage Low-Power Bandgap Reference Voltage in Standard CMOS Process

2. A CMOS resistorless bandgap reference with minimized current consumption

3. System and method for a proportional to absolute temperature circuit;marinca;U S Patent No 10 691 155,2020

4. An Efficient Approach to Improve PSRR Performance of Kuijk BGR Topology;hui;10th IEEE International Conference on Solid-State and Integrated Circuit Technology,2010

5. Noise Minimization for Low Power Bandgap Reference and Low Dropout Regulator Cores

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