A graph-theoretic approach to clock skew optimization-Reference-Cited by-同舟云学术

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A graph-theoretic approach to clock skew optimization

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Container-title:Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94
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Author:

Deokar R.B.,Sapatnekar S.S.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx2/3224/9169/00408825.pdf?arnumber=408825

Cited by 22 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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4. A Low Area Overhead Design Method for High-Performance General-Synchronous Circuits with Speculative Execution;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2019-12-01

5. Optimal VLSI Delay Tuning by Space Tapering With Clock-Tree Application;IEEE Transactions on Circuits and Systems I: Regular Papers;2017-08

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