Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors-Reference-Cited by-同舟云学术

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Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors

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Container-title:2004 IEEE International Reliability Physics Symposium. Proceedings
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Author:

Huard V.,Denais M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/9182/29131/01315299.pdf?arnumber=1315299

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