Full-Custom Design of Multiplicative Inverse for AES S-BOX using 4-Transistor XOR Gate-Reference-Cited by-同舟云学术

Full-Custom Design of Multiplicative Inverse for AES S-BOX using 4-Transistor XOR Gate

Author:

Rajput Rithambara,Patil Sujata

Publisher

IEEE

Link

Reference15 articles.

1. An optimized S-BOX circuit architecture for low power AES design;morioka;Proc Workshop Cryptographic Hardware and Embedded Systems (CHES '05),2002

2. The Advanced Encryption Standard,0

3. Design of XOR gates in VLSI implementation;ahmad;Proceedings of the Electronic New Zealand Conference (ENZCON 2010),2010

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