Author:
Wang Chao,Zhang Junneng,Li Xi,Wang Aili,Zhou Xuehai
Funder
National Science Foundation of China
Jiangsu Provincial Natural Science Foundation
State Key Laboratory of Computer Architecture, ICT, CAS
CCF-Tencent Open Research Fund
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
13 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Stencil-HMLS: A multi-layered approach to the automatic optimisation of stencil codes on FPGA;Proceedings of the SC '23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis;2023-11-12
2. FLIA: Architecture of Collaborated Mobile GPU and FPGA Heterogeneous Computing;Electronics;2022-11-16
3. A Survey of FPGA-Based Deep Learning Acceleration Research;Lecture Notes in Electrical Engineering;2022
4. An FPGA-Based Hardware Accelerator for 2D Labeling;2021 6th International Conference on Biomedical Signal and Image Processing;2021-08-20
5. A Ubiquitous Machine Learning Accelerator With Automatic Parallelization on FPGA;IEEE Transactions on Parallel and Distributed Systems;2020-10-01