Abstract
Accelerators, such as GPUs (Graphics Processing Unit) that is suitable for handling highly parallel data, and FPGA (Field Programmable Gate Array) with algorithms customized architectures, are widely adopted. The motivation is that algorithms with various parallel characteristics can efficiently map to the heterogeneous computing architecture by collaborated GPU and FPGA. However, current applications always utilize only one type of accelerator because the traditional development approaches need more support for heterogeneous processor collaboration. Therefore, a comprehensible architecture facilitates developers to employ heterogeneous computing applications. This paper proposes FLIA (Flow-Lead-In Architecture) for abstracting heterogeneous computing. FLIA implementation based on OpenCL extension supports task partition, communication, and synchronization. An embedded system of a three-dimensional waveform oscilloscope is selected as a case study. The experimental results show that the embedded heterogeneous computing achieves 21× speedup than the OpenCV baseline. Heterogeneous computing also consumes fewer FPGA resources than the pure FPGA accelerator, but their performance and energy consumption are approximate.
Funder
National Key R&D Program of China
National Natural Science Foundation of China
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
Reference32 articles.
1. Ross, J.A., Richie, D.A., Song, J.P., Shires, D.R., and Pollock, L.L. (2014, January 9–11). A case study of OpenCL on an Android mobile GPU. Proceedings of the High PERFORMANCE Extreme Computing Conference, Waltham, MA, USA.
2. Coarse-Grained Computation-Oriented Energy Modeling for Heterogeneous Parallel Embedded Systems;Int. J. Parallel Program.,2021
3. Efficient Path Tracer for the Presence of Mobile Virtual Reality;Hum.-Cent. Comput. Inf. Sci.,2021
4. Enabling Latency-Aware Data Initialization for Integrated CPU/GPU Heterogeneous Platform;IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.,2020
5. Resource-Aware Collaborative Allocation for CPU-FPGA Cloud Environments;IEEE Trans. Circuits Syst. II Express Briefs,2021
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