Exploring GPU-Accelerated Routing for FPGAs

Author:

Shen MinghuaORCID,Luo GuojieORCID,Xiao Nong

Funder

National Natural Science Foundation of China

Guangdong Introducing Innovative and Entrepreneurial Teams

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Signal Processing

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Deep-Learning Data-Driven Approach for Reducing FPGA Routing Runtimes;2023 International Conference on Field Programmable Technology (ICFPT);2023-12-12

2. The Energy-Efficient Resource Allocation of Multi-Modal Perception for Affective Brain-Computer Interactions Based on Non-Linear Iterative Prediction Scheme;網際網路技術學刊;2023-05

3. The Acceleration Techniques for the Modified Pathfinder Routing Algorithm on an Island-Style FPGA;2022 Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus);2022-01-25

4. Coarse-Grained Parallel Routing With Recursive Partitioning for FPGAs;IEEE Transactions on Parallel and Distributed Systems;2021-04-01

5. Generic quantum hardware accelerators for conventional systems;Advances in Computers;2021

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