High-performance Multi-function HMAC-SHA2 FPGA Implementation

Author:

Kieu-Do-Nguyen Binh1,Hoang Trong-Thuc1,Tsukamoto Akira2,Suzaki Kuniyasu2,Pham Cong-Kha1

Affiliation:

1. University of Electro-Communications (UEC),Tokyo,Japan,182-8585

2. National Institute of Advanced Industrial Science and Technology (AIST),Tokyo,Japan,135-0064

Funder

New Energy and Industrial Technology Development Organization

Publisher

IEEE

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Implementation of a Hash-based Secure Core for Integrity and Authentication of Data in Space Applications on Space-grade FPGAs;2023 IEEE 2nd Industrial Electronics Society Annual On-Line Conference (ONCON);2023-12-08

3. Towards Maximising Hardware Resources and Design Efficiency via High-Speed Implementation of HMAC based on SHA-256 Design;Pertanika Journal of Science and Technology;2023-11-06

4. An Unrolled and Pipelined Architecture for SHA2 Family of Hash Functions on FPGA;2023 16th International Conference on Information Security and Cryptology (ISCTürkiye);2023-10-18

5. Secure Data Transmission using Hybrid Crypto Processor based on AES and HMAC Algorithms;2023 2nd International Conference on Advancements in Electrical, Electronics, Communication, Computing and Automation (ICAECA);2023-06-16

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