Secure Data Transmission using Hybrid Crypto Processor based on AES and HMAC Algorithms
Author:
Affiliation:
1. Kumaraguru College of Technology,Electronics and Communication Engineering,Coimbatore,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10199105/10199188/10200277.pdf?arnumber=10200277
Reference18 articles.
1. Implementation of cryptanalysis based on FPGA hardware using AES with SHA-1
2. Further Analysis of PRNG-Based Key Derivation Functions
3. LabVIEW-FPGA based implementation of an Authenticated Encryption core
4. Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3
5. High-speed Pipeline Design for HMAC of SHA-256 with Masking Scheme
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1. A Heterogeneous Design Method for Reconfigurable Cryptographic Computing Array;2023 International Conference on Networks, Communications and Intelligent Computing (NCIC);2023-11-17
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