A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's-Reference-Cited by-同舟云学术

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A charge-transfer amplifier and an encoded-bus architecture for low-power SRAM's

Published:1998-05 Issue:5 Volume:33 Page:793-799
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Kawashima S.,Mori T.,Sasagawa R.,Hamaminato M.,Wakayama S.,Sukegawa K.,Fukushi I.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx4/4/14629/00668995.pdf?arnumber=668995

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4. A Self-Biased Charge-Transfer Sense Amplifier;2007 IEEE International Symposium on Circuits and Systems;2007-05

5. VLSI circuits and systems for microphotonic applications;Microelectronics: Design, Technology, and Packaging II;2005-12-28

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