Thermal simulations of lock-in-thermography for failure analysis of integrated circuits
Author:
Affiliation:
1. Advanced Micro Devices (Singapore) Pte Ltd,Device Analysis Lab,Singapore,469032
2. Singapore University of Technology and Design,Engineering Product Development Pillar,Singapore,487372
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10248978/10248979/10249046.pdf?arnumber=10249046
Reference11 articles.
1. Advanced 3D Localization in Lock-in Thermography Based on the Analysis of the TRTR (Time-Resolved Thermal Response) Received Upon Arbitrary Waveform Stimulation
2. Efficient Nondestructive 3D Defect Localization by Lock-in Thermography Utilizing Multi-Harmonics Analysis
3. Innovations in Fault Isolation Methods for 3D Packages with 10X Improvement in Accuracy
4. Acoustic GHz-microscopy and its potential applications in 3D-integration technologies
5. Temporary Bonding of Wafer to Carrier for 3D-Wafer Level Packaging
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