High-speed and low-power dynamic latch comparator

Author:

Moni D. Jackuline,Jisha P.

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Ultra-Compact Pulse Charger for Lithium Polymer Battery With Simple Built-in Resistance Compensation in Biomedical Applications;IEEE Transactions on Biomedical Circuits and Systems;2024-08

2. A Low Power, High Speed Improved By Dynamiclatchcomparator For Biomedical Acquisition System Using 180nm CMOS Technology;2023 First International Conference on Advances in Electrical, Electronics and Computational Intelligence (ICAEECI);2023-10-19

3. A Switched Capacitor Waveform Digitizing ASIC at Cryogenic Temperature for HPGe Detectors;IEEE Transactions on Nuclear Science;2021-08

4. A New 1 GS/s Sampling Rate and 400 μV Resolution with Reliable Power Consumption Dynamic Latched Type Comparator;Lecture Notes in Electrical Engineering;2018-07-26

5. Novel Gating Technique in D-Latch for Low Power Application;Proceedings of the Second International Conference on Information and Communication Technology for Competitive Strategies - ICTCS '16;2016

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