Author:
Pradhan K P,Sahu P K,Ranjan Rajeev
Cited by
8 articles.
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1. The role of process and geometrical parameters of gate stack Inverted-T shape junction less FET at 20 nm technology node;Micro and Nanostructures;2024-09
2. Impact of Variability on Novel Transistor Configurations in Adder Circuits at 7nm FinFET Technology;Journal of Circuits, Systems and Computers;2024-03-13
3. FinFET: A Revolution in Nanometer Regime;Lecture Notes in Electrical Engineering;2022
4. FinFET Technology;Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs;2021
5. Introduction;Mitigating Process Variability and Soft Errors at Circuit-Level for FinFETs;2021