Publisher
Springer International Publishing
Reference84 articles.
1. Agostinelli, M., Alioto, M., Esseni, D., Selmi, L.: Design and evaluation of mixed 3t-4t FinFET stacks for leakage reduction. In: Svensson, L., Monteiro, J. (eds.) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, pp. 31–41. Springer, Berlin (2009)
2. Alioto, M.: Analysis of layout density in FinFET standard cells and impact of fin technology. In: Proceedings of 2010 IEEE International Symposium on Circuits and Systems, pp. 3204–3207 (2010)
3. Alioto, M.: Comparative evaluation of layout density in 3t, 4t, and MT FinFET standard cells. IEEE Trans. Very Large Scale Integr. Syst. 19(5), 751–762 (2011)
4. Anil, K.G., Henson, K., Biesemans, S., Collaert, N.: Layout density analysis of FinFETs. In: ESSDERC ’03. 33rd Conference on European Solid-State Device Research, 2003, pp. 139–142 (2003)
5. Auth, C.: 22-nm fully-depleted tri-gate CMOS transistors. In: Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, pp. 1–6 (2012)