A 22-32.7 GHz Linearized LNA in 65-nm CMOS Using Multigate Transistor Technique
Author:
Affiliation:
1. University of Electronic Science and Technology of China,ChengDu,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10275796/10276388/10276839.pdf?arnumber=10276839
Reference10 articles.
1. A Wideband Variable Gain LNA With High OIP3 for 5G Using 40-nm Bulk CMOS
2. 38-GHz CMOS Linearized Receiver With IM3 Suppression, P 1 dB/IP3/RR3 Enhancements, and Mitigation of QAM Constellation Diagram Distortion in 5G MMW Systems
3. A 95GHz Receiver with Fundamental-Frequency VCO and Static Frequency Divider in 65nm Digital CMOS
4. A 26–31 GHz Linearized Wideband CMOS LNA Using Post-Distortion Technique
5. A Wideband Noise-Canceling CMOS LNA With Enhanced Linearity by Using Complementary nMOS and pMOS Configurations
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