A 20b Clockless DAC With Sub-ppm INL, 7.5 nV/√Hz Noise and 0.05 ppm/°C Stability-Reference-Cited by-同舟云学术

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A 20b Clockless DAC With Sub-ppm INL, 7.5 nV/√Hz Noise and 0.05 ppm/°C Stability

Published:2013-12 Issue:12 Volume:48 Page:3028-3037
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

McLachlan Roddy C.,Gillespie Alan,Coln Michael C. W.,Chisholm Douglas,Lee Denise T.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/6671390/06587828.pdf?arnumber=6587828

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A random shifting data weighted averaging algorithm for Nyquist-rate DAC;IEICE Electronics Express;2023-10-25

2. An in situ digital background calibration algorithm for multi-channel R-βR ladder DACs;Journal of Electronic Science and Technology;2022-03

3. An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-11

4. A monolithic 12-bit digitally calibrated D/A converter;IEICE Electronics Express;2021-01-25

5. An 8-bit Low-Cost String DAC With Gradient Errors Suppression to Achieve 16-bit Linearity;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-07

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