A 320-fs RMS Jitter and – 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC
Author:
Funder
Samsung
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/8811631/08737704.pdf?arnumber=8737704
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