Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver
Author:
Funder
Global Foundries
Intel Labs
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/9048008/08959379.pdf?arnumber=8959379
Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Two-Stage Interpolation Time-to-Digital Converter Implemented in 20 and 28 nm FGPAs;IEEE Transactions on Industrial Electronics;2024-11
2. Practical deployment of subsampling-based high-frequency signal acquisition system;Jornadas de Automática;2024-07-24
3. A 2.3nJ/b 32-APSK Polar Phase-Tracking Receiver with Two-Point Injection Technique;2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2024-06-16
4. A Fully Integrated 0–200-MHz System BW Wireless Direct Sampling Receiver in 14-nm FinFET;IEEE Solid-State Circuits Letters;2023
5. A 4.7-ps Resolution Recirculating Cyclic Vernier TDC Using DWA-Based Mismatch Correction and a Register-Based Time Amplifier;IEEE Transactions on Instrumentation and Measurement;2023
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