A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant-<inline-formula> <tex-math notation="LaTeX">${\rm G}_{\rm m}$ </tex-math> </inline-formula> Bias-Reference-Cited by-同舟云学术

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A 20 Gb/s 0.4 pJ/b Energy-Efficient Transmitter Driver Utilizing Constant- ${\rm G}_{\rm m}$ Bias

Published:2016-10 Issue:10 Volume:51 Page:2312-2327
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Jeong Gyu-Seob,Chu Sang-Hyeok,Kim Yoonsoo,Jang Sungchun,Kim Sungwoo,Bae Woorham,Cho Sung-Yong,Ju Haram,Jeong Deog-Kyoon

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/7581008/07508396.pdf?arnumber=7508396

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. Single-Ended PAM-4 Transmitters With Data Bus Inversion and ZQ Calibration for High-Speed Memory Interfaces;IEEE Journal of Solid-State Circuits;2024

3. A 4-nm 16-Gb/s/pin Single-Ended PAM-4 Parallel Transceiver With Switching-Jitter Compensation and Transmitter Optimization;IEEE Journal of Solid-State Circuits;2024-01

4. A Novel Bias Circuit Technique to Reduce the PVT Variation of the Ring Oscillator Frequency;Journal of Circuits, Systems and Computers;2022-09-28

5. A 15 Gb/s Non-Return-to-Zero Transmitter With 1-Tap Pre-Emphasis Feed-Forward Equalizer for Low-Power Ground Terminated Memory Interfaces;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-06

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