Towards Low Latency and Resource-Efficient FPGA Implementations of the MUSIC Algorithm for Direction of Arrival Estimation-Reference-Cited by-同舟云学术

Towards Low Latency and Resource-Efficient FPGA Implementations of the MUSIC Algorithm for Direction of Arrival Estimation

Published:2021-08 Issue:8 Volume:68 Page:3351-3362
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Butt Uzma M.,Khan Shoab A.,Ullah Anees^ORCID,Khaliq Abdul,Reviriego Pedro^ORCID,Zahir Ali^ORCID

Funder

Architecting Intelligent Cost-effective Central Offices to enable 5G Tactile Internet (ACHILLES) through the Spanish Ministry of Economy and Competitivity

Madrid Government (Comunidad de Madrid-Spain) through the Multiannual Agreement with Universidad Carlos III de Madrid (UC3M) in the line of Excellence of University Professors

Context of the V Plan Regional de Investigación Científica e Innovación Tecnológica (V PRICIT)

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/9481308/09445729.pdf?arnumber=9445729

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