An Output-Capacitorless Analog LDO Featuring Frequency Compensation of Four-Stage Amplifier
Author:
Affiliation:
1. Memory Division, Samsung Electronics, Hwaseong, South Korea
2. School of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea
Funder
Institute of Information and Communications Technology Planning and Evaluation (IITP) through the Korean Government (MSIT), Design of Time-Based Circuit for Low Power Integrated System
DRAM PIM Design Base Technology Development
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/10027800/09964454.pdf?arnumber=9964454
Reference17 articles.
1. High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads
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