A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers
Author:
Affiliation:
1. School of Electrical and Electronic Engineering and the Microelectronic Circuits Centre Ireland, University College Dublin, Dublin 4, Ireland
Funder
Science Foundation Ireland
Enterprise Ireland
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/9929246/09854133.pdf?arnumber=9854133
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Fully Synthesizable Fractional-N MDLL With Energy-Efficient Ring-Oscillator-Based DTC of Large Tuning Range;IEEE Solid-State Circuits Letters;2024
2. Comparison of DTC-Related Spurs in Fractional-N Digital PLLs with MASH-and-ENOP-based Divider Controllers;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04
3. Comparison of the Simulated Performance of Divider Controllers for Fractional-N Frequency Synthesizers;2023 34th Irish Signals and Systems Conference (ISSC);2023-06-13
4. Nonlinearity-Induced Spurs in Fractional-NFrequency Synthesizers;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-06
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