Comparison of the Simulated Performance of Divider Controllers for Fractional-N Frequency Synthesizers
Author:
Affiliation:
1. University College Dublin Belfield,School of Electrical and Electronic Engineering,Dublin 4,Ireland
2. Ireland University College Dublin Belfield,Microelectronic Circuits Centre,Dublin 4,Ireland
Funder
Science Foundation Ireland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10161993/10161996/10162070.pdf?arnumber=10162070
Reference10 articles.
1. A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers
2. Spurious Tone Suppression Techniques Applied to a Wide-Bandwidth 2.4 GHz Fractional-N PLL
3. Optimized MASH-SR Divider Controller for Fractional-N Frequency Synthesizers
4. A Wideband 2.4-GHz Delta-Sigma Fractional->tex<$N$>/tex<PLL With 1-Mb/s In-Loop Modulation
5. LSB Dithering in MASH Delta–Sigma D/A Converters
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