A 53–78 GHz Complementary Push–Push Frequency Doubler With Implicit Dual Resonance for Output Power Combining
Author:
Affiliation:
1. School of Science and Engineering (SSE), The Chinese University of Hong Kong, Shenzhen, China
Funder
Key-Area Research and Development Program of Guangdong Province
Shenzhen Science and Technology Program
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/10052778/09994633.pdf?arnumber=9994633
Reference41 articles.
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2. A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration
3. A 28-GHz Quadrature Fractional-N Frequency Synthesizer for 5G Transceivers With Less Than 100-fs Jitter Based on Cascaded PLL Architecture
4. A 60 GHz-band 1 V 11.5 dBm power amplifier with 11% PAE in 65 nm CMOS;chan;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2009
5. A fully-integrated dual-polarization 16-element W-band phased-array transceiver in SiGe BiCMOS
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