A 0.2–25GHz Inductorless Complementary Pseudo-Push-Push Frequency Doubler
Author:
Affiliation:
1. The Chinese University of Hong Kong,Shenzhen,China
Funder
Shenzhen Science and Technology Innovation Program
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10599936/10599927/10600044.pdf?arnumber=10600044
Reference9 articles.
1. Octave-Tuning Dual-Core Folded VCO Leveraging a Triple-Mode Switch-Less Tertiary Magnetic Loop
2. Switched Capacitor Bank Design With Geometric Progression for Wideband Frequency Doubler
3. A 53–78 GHz Complementary Push–Push Frequency Doubler With Implicit Dual Resonance for Output Power Combining
4. A Buffer-Less Wideband Frequency Doubler in 45-nm CMOS-SOI With Transistor Multiport Waveform Shaping Achieving 25% Drain Efficiency and 46–89 GHz Instantaneous Bandwidth
5. A 4.4mW Inductorless 2–20 GHz Single-Ended to Differential Frequency Doubler in 45 nm RFSOI CMOS Technology
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