An 8-bit Low-Cost String DAC With Gradient Errors Suppression to Achieve 16-bit Linearity
Author:
Funder
Texas Instruments
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/9127215/09011579.pdf?arnumber=9011579
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Analysis of non-ideal factors for a high precision interpolated resistor string DAC;Microelectronics Journal;2024-01
2. Development and Efficiency Analysis of a Switching Scheme for INL Reduction in Unary DACs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09
3. Comparative Analysis of Switching Schemes for 8-bit Arrays in Binary DACs;2022 International Conference on Electrical Engineering and Photonics (EExPolytech);2022-10-20
4. A Metric of Elements Placement Properties for Nonlinearity Reduction Prediction in Binary DACs;2022 Conference of Russian Young Researchers in Electrical and Electronic Engineering (ElConRus);2022-01-25
5. An Area-Efficient High-Resolution Segmented ΣΔ-DAC for Built-In Self-Test Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-11
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