Near-Optimal Decoding of Incremental Delta-Sigma ADC Output
Author:
Funder
NPRP from the Qatar National Research Fund
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/9240118/09152080.pdf?arnumber=9152080
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Novel Linear Filter for Incremental Delta-Sigma ADC Based on Modified Least Squares Algorithm;Circuits, Systems, and Signal Processing;2024-02-28
2. Power-Efficient LFP-Adaptive Dynamic Zoom-and-Track Incremental ΔΣ Front-End for Dual-Band Subcortical Recordings;IEEE Transactions on Biomedical Circuits and Systems;2023-08
3. The design of ΔΣ-ADC in MEMS gyro interface ASIC;Microelectronics Journal;2023-04
4. Analysis of Residual Error from Amplifier Offset Chopping in Incremental ΔΣ ADCs Without Decimation Filter Synchronization;IEEE Transactions on Circuits and Systems II: Express Briefs;2023
5. L${}_{\text{2}}$min${}^{\text{2/2s}}$: Efficient Linear Reconstruction Filter for Incremental Delta-Sigma ADCs;IEEE Transactions on Signal Processing;2023
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