FPGA-Based Implementation of the Stereo Matching Algorithm Using High-Level Synthesis
Author:
Affiliation:
1. University of Tsukuba,Faculty of Engineering, Information, and Systems,Tsukuba,Ibaraki,Japan,305-8573
Funder
New Energy and Industrial Technology Development Organization (NEDO)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9691770/9691932/09691974.pdf?arnumber=9691974
Reference21 articles.
1. Real-Time Low-Power FPGA Architecture for Stereo Vision
2. FPGA-Based Stereo Vision System Using Gradient Feature Correspondence
3. Real-Time High-Quality Stereo Vision System in FPGA
4. Fast and Accurate Stereo Vision System on FPGA. ACM Trans;jin;Reconfig Technol Syst,2014
5. FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications
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