A Dynamic Memory Allocation Library for High-Level Synthesis-Reference-Cited by-同舟云学术

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A Dynamic Memory Allocation Library for High-Level Synthesis

Published:2019-09 Issue: Volume: Page:
ISSN:
Container-title:2019 29th International Conference on Field Programmable Logic and Applications (FPL)
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Author:

Giamblanco Nicholas V.,Anderson Jason H.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8890609/8891988/08892015.pdf?arnumber=8892015

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Field‐programmable Gate Arrays;Design for Embedded Image Processing on FPGAs;2023-09-05

2. High-Performance Memory Allocation on FPGA With Reduced Internal Fragmentation;IEEE Access;2023

3. VLSI implementation of low-power and area efficient parallel memory allocation with EC-TCAM;Integration;2022-11

4. FPGA HLS Today: Successes, Challenges, and Opportunities;ACM Transactions on Reconfigurable Technology and Systems;2022-08-08

5. Dynamic Heap Management in High-Level Synthesis for Many-Accelerator Architectures;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08

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