Failure mechanisms in chip-metallization in power applications
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6808929/6813763/06813772.pdf?arnumber=6813772
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Thermo-mechanical fatigue induced unexpected strain hardening of Cu clip wiring on transfer-mold type EV power modules;International Journal of Fatigue;2023-07
2. Power metallization degradation monitoring on power MOSFETs by means of concurrent degradation processes;Journal of Power Electronics;2022-05-30
3. Optimizing the Nano Wiring and KlettSintering parameters for low-temperature die to DCB attach of power electronic chips;2021 16th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT);2021-12-21
4. A Simple Metal-Semiconductor Substructure Model for the Thermal Induced Fatigue Simulation in Power Integrated Circuits;Proceedings of the 1st International Conference on Numerical Modelling in Engineering;2018-08-29
5. A simple metal-semiconductor substructure for the advanced thermo-mechanical numerical modeling of the power integrated circuits;Microelectronics Reliability;2018-08
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