A D-Band Patch Array Antenna Using 180 nm CMOS Process
Author:
Affiliation:
1. National Taipei University of Technology,Department of Electronic Engineering,Taipei,Taiwan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10439662/10439663/10439936.pdf?arnumber=10439936
Reference7 articles.
1. High-Gain On-Chip Antenna Design on Silicon Layer With Aperture Excitation for Terahertz Applications
2. Wide Impedance-Bandwidth and Gain-Bandwidth Terahertz On-Chip Antenna With Chip-Integrated Dielectric Resonator
3. A Transmitter System-in-Package at 300 GHz With an Off-Chip Antenna and GaAs-Based MMICs
4. An Ultrawide Ku- To W-Band Array Antenna Package Using Flip-Chipped Silicon Integrated Passive Device With Multilayer PCB Technology
5. Dual-Mode Substrate Wave Cancellation in a 120 GHz 2 × 2 On-Chip Dipole Array
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