A L/S/C/X/Ku-Band Three-Stack, Two stages Fully Integrated CMOS Power Amplifier with 20.9 % PAE Using T-Network
Author:
Affiliation:
1. National Institute of Technology,Deptt. of ECE,Mangalore,Karnataka,India,575025
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10439662/10439663/10439744.pdf?arnumber=10439744
Reference10 articles.
1. A 92 GHz Bandwidth Distributed Amplifier in a 45 nm SOI CMOS Technology
2. A CMOS Distributed Amplifier With Distributed Active Input Balun Using GBW and Linearity Enhancing Techniques
3. A Novel Distributed Amplifier With High Gain, Low Noise, and High Output Power in ${\hbox{0.18-}} \mu{\hbox {m}}$ CMOS Technology
4. A high-gain low-noise distributed amplifier with low DC power in 0.18-µm CMOS for vital sign detection radar
5. A nonuniform distributed power amplifier in 0.18-mm CMOS technology
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