Comparative Analysis of Phase Locked Loop with Different Phase Frequency Detectors using 90nm Technology-Reference-Cited by-同舟云学术

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Comparative Analysis of Phase Locked Loop with Different Phase Frequency Detectors using 90nm Technology

Published:2023-12-01 Issue: Volume:35 Page:1-5
ISSN:
Container-title:2023 Global Conference on Information Technologies and Communications (GCITC)
language:
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Author:

Snehalatha G.¹,Selvakumar J.²,Thuraka Esther Rani³

Affiliation:

1. SRM Institute of Science and Technology,Dept. of ECE,Chennai,India

2. SRM Institute of Science and Technology, Kattankulathur,Electronics and Communication Engineering,Chennai,India

3. CVR College of Engineering,Electronics and Communication Engineering,Hyderabad,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10424963/10425791/10425951.pdf?arnumber=10425951

Reference12 articles.

1. A −40-dBc Integrated-Phase-Noise 45-GHz Sub-Sampling PLL with 3.9-dBm Output and 2.1% DC-to-RF Efficiency

2. High Performance Single-Phase PLL with Sliding Fourier Transform as a Phase Detector

3. Design of a Low Power PLL in 90nm CMOS Technology

4. An area efficient low power Phase- Frequency detector for PLL applications\;Akhatar

5. A New Design of Phase-Locked Loop with Multiple Frequencies for Communication Standard

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